[SystemSafety] Fwd: Rethinking Safety and Security/11 PCB Layout Myths

Peter Bernard Ladkin ladkin at causalis.com
Thu Dec 8 06:35:38 CET 2016

On 2016-12-08 01:52 , Andy wrote:
> Begin forwarded message:
>> *From:* "Electronic Design Today" <news at enews.electronicdesign.com
>> <mailto:news at enews.electronicdesign.com>> ......
>> *Subject:* *Rethinking Safety and Security

A fairly trivial comment, and wrong in detail.

Wong makes the common mistake of formulating equivalence between "levels", here the Design Assurance
Levels (DAL) of avionics with the Automotive Safety Integrity Levels (ASILs) of ISO 26262. See my
IET SSCS 2016 paper on ED-153 and IEC 61508, which I attach, for another example - ED-153 makes an
inappropriate equivalence also.

DALs are criticality levels. How critical something is to the operation of the system, and therefore
what level of assurance to which it should be subject.

A SIL is a reliability requirement on a safety function. A safety function is something whose action
reduces an unacceptable risk of a specific hazard to an acceptable risk. It operates as designed
only if the reliability requirement set by the SIL is fulfilled.

In principle, all safety functions have the same criticality: they are all critical, period. So, one
criticality level, rather than the five of ED-12C.

The German electrotechnical standards organisation has recently produced guidelines for introducing
IT-security measures into safety-related E/E/PE industrial automation and
control systems (IACS). This is hot off the press - the final version for publication has only been
available since Monday. It's not long, 15pp. I have undertaken to translate it into English this
month sometime. I attach also a short description which I prepared for others.


Prof. Peter Bernard Ladkin, Bielefeld, Germany
Je suis Charlie
Tel+msg +49 (0)521 880 7319  www.rvs-bi.de

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