[SystemSafety] multi-core validation for aerospace

[Tom Ferrell]

The starting point for this is to digest the current Certification Review Item (CRI) that is being used by EASA.  I don’t see where it is posted on the EASA website but it is widely circulated in generic form.  I will send to you directly.

From: systemsafety [mailto:systemsafety-bounces at lists.techfak.uni-bielefeld.de] On Behalf Of Chris Hills
Sent: Tuesday, November 13, 2018 11:11 AM
To: systemsafety at lists.techfak.uni-bielefeld.de
Subject: [SystemSafety] multi-core validation for aerospace

Hi All

I have a customer who is looking at a project that will be multi-core processors for aviation use.  They are going to have to validate the system and its software. They are trying to work out how they would gather sufficient evidence for this.

They are looking at different cores on the same device.  Different cores could potentially run different functions each, or could use something across all the cores. Design is up in the air just now, so they are looking for a general certification approach and what they  would need to achieve this and  any ways they  could do it using more automated methods where possible.

Does anyone have any pointers for them to get started?
This is a UK based project.

Regards
  Chris
Phaedrus Systems Ltd
96 Brambling B77 5PG
FREEphone 0808 1800 358    International +44 1827 259 546
Vat GB860621831  Co Reg #04120771
Http://www.phaedsys.com<http://www.phaedsys.com/>  chills at phaedsys.com<mailto:chills at phaedsys.com>


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